Error rate measuring apparatus and codeword position display method

ABSTRACT

An error rate measuring apparatus includes an operation unit that sets a codeword length and an FEC symbol length, a display unit that displays bit string data obtained by converting a signal from a device under test, a codeword position calculation means for calculating a codeword head position from the FEC symbol length, codeword head symbol information, and an FEC symbol position, calculating codeword position information of a zeroth address of a display screen from the codeword head position, the codeword length, and the FEC symbol length, and calculating position information of a codeword at a currently selected position of a cursor from the codeword position information of the zeroth address of the display screen, the codeword length, the FEC symbol length, and a position of the cursor on the display screen, and display control means for displaying the calculated position information of the codeword on the display screen.

TECHNICAL FIELD

The present invention relates to an error rate measuring apparatus that transmits a known pattern (Pulse Amplitude Modulation 4 (PAM4) signal) as a test signal to a device under test in a state in which the device under test has transited to a state of a signal pattern return and measures a bit error rate of input data returned and received from the device under test in association with the transmission of the test signal, and in particular, measures whether or not a forward error correction (FEC) operation of the device under test is possible, and a codeword position display method.

BACKGROUND ART

For example, as disclosed in Patent Document 1 described below, an error rate measuring apparatus is hitherto known as an apparatus that transmits a test signal of a known pattern including fixed data to a device under test and compares a signal under test returned and received from the device under test with the transmission of the test signal with a reference signal to be a reference in units of bits to measure a bit error rate (BER)

Incidentally, in a case where a PAM is particularly used as the test signal, while a large amount of transmission can be realized compared to Non Return to Zero (NRZ), an Eye opening is small, and thus, a signal to noise ratio (SNR) is damaged compared to the NRZ. For this reason, as the number of symbols increases, the influence of noise also becomes large, and it is extremely difficult to make errors zero. Therefore, it is desirable to count FEC symbol errors that occur in a region corresponding to a communication standard of the device under test to be measured and to measure whether or not error correction based on forward error correction (FEC) is possible.

RELATED ART DOCUMENT Patent Document

[Patent Document 1] JP-A-2007-274474

DISCLOSURE OF THE INVENTION Problem that the Invention is to Solve

The error rate measuring apparatus of Patent Document 1 described above has a function of displaying a currently selected position, but does not have a function of displaying a relative positional relationship between a codeword head position of a pattern in capture data of an FEC symbol and a currently selected codeword position in an identifiable manner.

That is, there is a problem in that it is not clear how far is the currently selected codeword position from the codeword head position. For this reason, it is not possible to instantly recognize a relationship between a codeword position and a delimiter of each codeword. In a case where an error occurs in a device under test due to a specific input pattern, it is not possible to recognize where an error easily occurs and occurrences of an Uncorrectable codeword (a codeword on which forward error correction is impossible) of each codeword.

Accordingly, the invention has been accomplished in view of the above-described problem, and an object of the invention is to provide an error rate measuring apparatus and a codeword position display method capable of recognizing a currently selected codeword position with a cursor on a display screen.

Means for Solving the Problem

To achieve the above-described object, there is provided an error rate measuring apparatus 1 according to a first aspect of the invention that inputs an NRZ signal of a known pattern as a test signal to a device under test W, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the received signal and the test signal. The error rate measuring apparatus includes

an operation unit 4 that sets a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test,

a display unit 6 that displays bit string data obtained by converting the signal received from the device under test on a display screen,

codeword position calculation means 7 b for calculating a codeword head position from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, and an FEC symbol position, calculating codeword position information of a zeroth address of the display screen from the codeword head position, the codeword length, and the FEC symbol length, and from the codeword position information of the zeroth address of the display screen, the codeword length, the FEC symbol length, and a position of a cursor 21 a on the display screen, calculating position information of a codeword indicating a position of the symbol currently selected by the cursor in a codeword and a position of the codeword in the received signal, and

display control means 7 c for displaying the position information of the codeword calculated by the codeword position calculation means on the display screen.

According to a second aspect of the invention, there is provided an error rate measuring apparatus 1 that inputs a PAM4 signal of a known pattern as a test signal to a device under test W, receives a signal from the device under test with the input of the test signal, and measures whether or not an FEC operation of the device under test is possible based on a comparison result of the received signal and the test signal. The error rate measuring apparatus includes

an operation unit 4 that sets a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test,

a display unit 6 that displays most significant bit string data and least significant bit string data of each piece of symbol string data obtained by converting the signal received from the device under test in parallel on a display screen,

codeword position calculation means 7 b for calculating a codeword head position from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, and an FEC symbol position, calculating codeword position information of a zeroth address of the display screen from the codeword head position, the codeword length, and the FEC symbol length, and from the codeword position information of the zeroth address of the display screen, the codeword length, the FEC symbol length, and a position of a cursor 21 a on the display screen, calculating position information of a codeword indicating a position of the symbol currently selected by the cursor in a codeword and a position of the codeword in the received signal, and

display control means 7 c for displaying the position information of the codeword calculated by the codeword position calculation means on the display screen.

According to a third aspect of the invention, in the error rate measuring apparatus of the first aspect or the second aspect,

the display control means 7 c moves the cursor 21 a to a head bit of a desired codeword based on a key operation of the operation unit and a calculation result of the codeword position calculation means 7 b.

According to a fourth aspect of the invention, there is provided a codeword position display method for an error rate measuring apparatus 1 that inputs an NRZ signal of a known pattern as a test signal to a device under test W, receives a signal from the device under test with the input of the test signal, and measures whether or not an FEC operation of the device under test is possible based on a comparison result of the received signal and the test signal. The codeword position display method includes

a step of setting a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test,

a step of displaying bit string data obtained by converting the signal received from the device under test on a display screen of a display unit 6,

a step of calculating a codeword head position from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, and an FEC symbol position by codeword position calculation means 7 b,

a step of calculating codeword position information of a zeroth address of the display screen from the codeword head position, the codeword length, and the FEC symbol length by the codeword position calculation means,

a step of, from the codeword position information of the zeroth address of the display screen, the codeword length, the FEC symbol length, and a position of a cursor 21 a on the display screen, calculating position information of a codeword indicating a position of the symbol currently selected by the cursor in a codeword and a position of the codeword in the received signal, and

a step of displaying the position information of the codeword calculated by the codeword position calculation means on the display screen.

According to a fifth aspect of the invention, there is provided a codeword position display method for an error rate measuring apparatus 1 that inputs a PAM4 signal of a known pattern as a test signal to a device under test W, receives a signal from the device under test with the input of the test signal, and measures whether or not an FEC operation of the device under test is possible based on a comparison result of the received signal and the test signal. The codeword position display method includes

a step of setting a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test,

a step of displaying most significant bit string data and least significant bit string data of each piece of symbol string data obtained by converting the signal received from the device under test in parallel on a display screen of a display unit 6,

a step of calculating a codeword head position from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, and an FEC symbol position by codeword position calculation means 7 b,

a step of calculating codeword position information of a zeroth address of the display screen from the codeword head position, the codeword length, and the FEC symbol length by the codeword position calculation means,

a step of, from the codeword position information of the zeroth address of the display screen, the codeword length, the FEC symbol length, and a position of a cursor 21 a on the display screen, calculating position information of a codeword indicating a position of the symbol currently selected by the cursor in a codeword and a position of the codeword in the received signal, and

a step of displaying the position information of the codeword calculated by the codeword position calculation means on the display screen.

According to a sixth aspect of the invention, the codeword position display method according to the fourth aspect or the fifth aspect further includes

a step of moving the cursor 21 a to a head bit of a desired codeword based on a key operation of an operation unit and a calculation result of the codeword position calculation means 7 b.

Advantage of the Invention

According to the aspects of the invention, since how far is a codeword position currently selected by a user with the cursor on the display screen from a head position of a codeword is displayed, it is possible to instantly recognize a relationship between a codeword position and a delimiter of each codeword.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing the schematic configuration of an error rate measuring apparatus according to the invention.

FIG. 2 is an explanatory view of a PAM4 signal.

FIGS. 3A and 3B are diagrams showing an example of a setting screen of the error rate measuring apparatus according to the invention.

FIG. 4 is a diagram showing an example of a capture screen when MSB data and LSB data are divided and displayed in units of 30 bits in the error rate measuring apparatus according to the invention.

FIG. 5 is a diagram showing an example of a capture screen when MSB data and LSB data are divided and displayed in units of 20 bits in the error rate measuring apparatus according to the invention.

FIG. 6 is a diagram showing an example of a capture screen when bit string data is displayed in units of 30 bits in the error rate measuring apparatus according to the invention.

FIG. 7 is a flowchart of a processing operation of error counting including data division display in a case where a PAM4 signal is input to a device under test in the error rate measuring apparatus according to the invention.

FIG. 8 is a flowchart showing a procedure of a calculation method of a codeword position at a selected position of a cursor in the error rate measuring apparatus according to the invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, a mode for carrying out the invention will be described in detail referring to the accompanying drawings.

An error rate measuring apparatus according to the invention transmits a test signal of a known pattern to a device under test in a state in which the device under test has transited to a state of signal pattern return and measures an error rate of a received signal returned from the device under test with the transmission of the test signal.

As shown in FIG. 1 , an error rate measuring apparatus 1 of an embodiment has a function of measuring whether or not a forward error correction (FEC) operation of a device under test W is possible based on a comparison result of a received signal from the device under test W when an NRZ signal of a known pattern with an inserted error or a PAM4 signal having four symbol values is input as a test signal to the device under test W, and the test signal, and schematically includes a signal generator 2, an error detector 3, an operation unit 4, a storage unit 5, a display unit 6, and a control unit 7.

In the embodiment, the configuration and processing content for realizing the function of measuring whether or not the FEC operation of the device under test W is possible is primarily described.

The signal generator 2 generates, as reference data based on a multi-value signal, an NRZ signal in a system in which there is no return to zero between bits or a PAM4 signal formed of desired symbol string data (data of a string of symbols having symbol values of 0, 1, 2, 3).

In a case of generating the PAM4 signal, as shown in FIG. 1 , the signal generator 2 schematically includes a first signal generation unit 2 a, a second signal generation unit 2 b, and a signal synthesis and output unit 2 c.

The PAM4 signal has amplitude that is divided into four kinds for each symbol, as shown in FIG. 2 and has four different voltage levels V1, V2, V3, and V4 of amplitude. An entire amplitude voltage range H is divided into a low voltage range H1, a medium voltage range H2, and a high voltage range H3 in an ascending order of the voltage levels, and is formed of consecutive ranges based on three eye pattern openings.

Upon generating a desired PAM4 symbol string in a known pattern including fixed data, the first signal generation unit 2 a generates a most significant bit (MSB) string signal that is added to a least significant bit (LSB) string signal to be generated by the second signal generation unit 2 b to generate the PAM4 signal.

The second signal generation unit 2 b generates the least significant bit string signal that is added to the most significant bit string signal generated by the first signal generation unit 2 a to generate the PAM4 signal.

Examples of specific bit string signals that are generated by the first signal generation unit 2 a and the second signal generation unit 2 b include periodic patterns, such as various pseudo random patterns (Pseudo Random Bit Sequence (PRBS)) including PRBS7 (pattern length: 2⁷−1), PRBS9 (pattern length: 2⁹−1), PRBS10 (pattern length: 2¹⁰−1), PRBS11 (pattern length: 2¹¹−1), PRBS15 (pattern length: 2¹⁵−1), and PRBS20 (pattern length: 2²⁰−1), evaluation patterns for evaluating PAM including PRBS13Q, PRBS31Q, and SSPRQ, and a Reed-Solomon Forward Error Correction (RS-FEC) encoded scrambled idle pattern.

The signal synthesis and output unit 2 c adds the most significant bit string signal generated by the first signal generation unit 2 a and the least significant bit string signal generated by the second signal generation unit 2 b to output the PAM4 signal. The PAM4 signal is input as a test signal of a known pattern to the device under test W in measuring an error rate or the like of the device under test W.

An error that is inserted into the test signal is optional. For example, any FEC symbol error is inserted in a case of checking FEC error tolerance of the device under test W. Furthermore, in a case of confirming tolerance of the device under test W, an error is inserted, and in a case where the device under test W confirms an error with any other test signals, an error is not inserted and confirmation is performed with a capture function.

The error detector 3 receives a signal to be output from the device under test W with the input of the NRZ signal or the PAM4 signal and measures the error rate or the like when the NRZ signal or the PAM4 signal to be reference data is input as the test signal of the known pattern from the signal generator 2 to the device under test W, and as shown in FIG. 1 , includes a signal reception unit 3 a, a synchronization detection unit 3 b, a position information storage unit 3 c, a data comparison unit 3 d, and a data storage unit 3 e.

In a case where the test signal input to the device under test W is the NRZ signal, the signal reception unit 3 a samples the NRZ signal received from the device under test W in a predetermined sampling period to convert the signal into bit string data (data of a bit string having 0 and 1). The bit string data converted by the signal reception unit 3 a is input to the synchronization detection unit 3 b.

In a case where the test signal input to the device under test W is the PAM4 signal, the signal reception unit 3 a samples the PAM4 signal received from the device under test W in a predetermined sampling period to convert the signal into symbol string data (data of a string of symbols having symbol values of 0, 1, 2, and 3). The symbol string data converted by the signal reception unit 3 a is input to the synchronization detection unit 3 b.

In a case where the test signal input to the device under test W is the NRZ signal, the synchronization detection unit 3 b synchronously fetches the reference data that is data of the bit string of the NRZ signal to be a reference read from the storage unit 5 and the bit string data of the NRZ signal received from the device under test W and output from the signal reception unit 3 a at a setting timing set in advance by the operation unit 4, and outputs the fetched bit string data to be input data to the data comparison unit 3 d.

In a case where the test signal input to the device under test W is the PAM4 signal, the synchronization detection unit 3 b synchronously fetches reference data that is data of the symbol string of the PAM4 signal to be a reference read from the storage unit 5 and the symbol string data of the PAM4 signal received from the device under test W and output from the signal reception unit 3 a at a setting timing set in advance by the operation unit 4, and outputs the fetched symbol string data to be input data to the data comparison unit 3 d.

The setting timing is set in advance by the operation unit 4, for example, on the setting screen (not shown) of the display unit 6, and is a timing at which a trigger signal is generated in response to a user's instruction, a timing at which a designated number of FEC symbol errors occur in one codeword length (for example, in a case where one codeword is 544 FEC symbols, and the user wants to capture at a timing at which 16 FEC symbol errors occur, synchronization is achieved at a timing at which 16/544 FEC symbol errors occur), or a timing at which a designated number of FEC symbol errors continuously occur (synchronization is achieved at a timing at which continuous FEC symbol errors occur by a number designated by the user, regardless of a Codeword).

The synchronization detection unit 3 b detects alignment marker information from the bit string data or the symbol string data received by the signal reception unit 3 a, acquires codeword head symbol information from the detected alignment marker information, and notifies the position information storage unit 3 c of the acquired codeword head symbol information.

The alignment marker information is obtained by detecting an alignment marker pattern included in a scrambled idle pattern appearing in a predetermined period as a pattern for lane identification by a known procedure meeting a standard.

The codeword head symbol information is a value indicating what number FEC symbol from FEC symbol position data where a head symbol of a codeword is present.

The FEC symbol position, that is, the head of one FEC symbol of the bit string data or the symbol string data is detected by making a counter of the data comparison unit 3 d run free to assume the head.

The codeword head symbol information may be stored in advance in the storage unit 5 as FPGA information based on a fixed value by the error rate measuring apparatus 1 and may be read by the control unit 7 as necessary.

When synchronization is achieved, the synchronization detection unit 3 b notifies the data comparison unit 3 d that synchronization is achieved, and stores a synchronous position representing a position of a bit or a symbol in the reference data when synchronization is achieved, in the position information storage unit 3 c.

When synchronization of the reference data and the bit string data of the NRZ signal or the symbol string data of the PAM4 signal from the signal reception unit 3 a is achieved by the synchronization detection unit 3 b, the position information storage unit 3 c stores the synchronous position representing the position of the bit or the symbol in the reference data when synchronization is achieved. The position information storage unit 3 c stores the codeword head symbol information notified from the synchronization detection unit 3 b.

In a case where the test signal input to the device under test W is the NRZ signal, the data comparison unit 3 d captures the head of one FEC symbol (10 bits or 20 bits) of the bit string data fetched synchronously with the reference data (test signal) at the setting timing by the synchronization detection unit 3 b and compares each bit with error data (“1”) to detect errors of each one codeword length. That is, in a case where the bit of the bit string data is “1”, this is detected as an error. The head of one FEC symbol of the bit string data is detected by making the counter of the data comparison unit 3 d run free to assume the head.

In a case where the test signal input to the device under test W is the NRZ signal, the data comparison unit 3 d divides the bit string data fetched synchronously with the reference data (test signal) at the setting timing by the synchronization detection unit 3 b by one FEC symbol length (10 bits or 20 bits) and detects FEC symbol errors at one FEC symbol interval. For example, in a case where one FEC symbol length is 10 bits, the bit string data is divided by 10 bits, and in a case where an error occurs even in one bit within 10 bits, this is detected as one FEC symbol error.

In a case where the test signal input to the device under test W is the PAM4 signal, the data comparison unit 3 d captures the head of one FEC symbol (10 bits or 20 bits) of the symbol string data fetched synchronously with the reference data (test signal) at the setting timing by the synchronization detection unit 3 b to divide the symbol string data into most significant bit string data (hereinafter, referred to as MSB data) and least significant bit string data (hereinafter, referred to as LSB data) by data division means 3 da, and compares each of the MSB data and the LSB data with the error data (“1”) to detect each of a most significant bit error (hereinafter, referred to as an MSB error) and a least significant bit error (hereinafter, referred to as an LSB error) of each one codeword length. That is, in a case where the divided MSB data is “1”, this is detected and counted as an MSB error, and in a case where the divided LSB data is “1”, this is detected as an LSB error. The head of one FEC symbol of the symbol string data is detected by making the counter of the data comparison unit 3 d run free to assume the head.

In a case where the test signal input to the device under test W is the PAM4 signal, the data comparison unit 3 d divides MSB data and LSB data by one FEC symbol length (10 bits or 20 bits), and detects FEC symbol errors in each of the MSB data and the LSB data at one FEC symbol interval. For example, in a case where one FEC symbol length is 10 bits, the MSB data and the LSB data are divided by 10 bits, and in a case where an error occurs even in one bit within 10 bits, this is detected as one FEC symbol error.

In FIG. 1 , for convenience of description, although a configuration in which the data comparison unit 3 d includes the data division means 3 da has been described, the data division means 3 da can be configured of a known PAM decoder, for example.

The data storage unit 3 e stores comparison result data by the data comparison unit 3 d, FEC symbol position data indicating the head of one FEC symbol of the bit string data or the symbol string data, or the like along with the bit string data or the symbol string data synchronized with the reference data.

The operation unit 4 also functions as setting means, and is configured of, for example, a user interface, such as an operation knob, various keys, switches, or buttons of the error rate measuring apparatus 1 of FIG. 1 , or softkeys on a display screen of the display unit 6. The operation unit 4 executes various kinds of setting regarding an error rate measurement, such as setting of the setting timing, designation of a block of the bit string data or the symbol string data displayed on the display screen (the capture screen 6 a of FIGS. 3A and 3B) of the display unit 6, setting of baud rate or generation conditions of a bit string or a symbol string, and an instruction to start or end the error rate measurement.

FIG. 3A shows an example of a setting screen 11 on which setting parameters (one codeword length of the FEC, one FEC symbol length, and an FEC Symbol Error Threshold (a threshold value of FEC symbol errors for starting capture) of the FEC) to a signal received from the device under test W are set.

On the setting screen 11 of FIG. 3A, as “Number of FEC Symbols in a Codeword” indicating the length of one codeword of the FEC, one codeword is displayed by, for example, a violet bar-shaped graphic 12 of which the length is partially omitted and which is sectioned by FEC symbols.

At a position directly below the graphic 12 of “Number of FEC Symbols in a Codeword”, an input box 13 for selecting and setting the number of FEC symbols forming “Codeword Length” from a pull-down menu is displayed. The setting screen 11 of FIG. 3A shows a state in which “544” is selected and set in the input box 13.

At a position directly above the graphic 12 of “Number of FEC Symbols in a Codeword”, “Bit Length in an FEC Symbol” that is indicated as forming a part of a codeword by a dotted line and is color-coded is displayed by a bar-shaped graphic 14. For example, color-coding display is performed in such a manner that the graphic 14 of the FEC symbol is blue and portions corresponding to a graphic 12 a of the codeword except for the graphic 14 of the FEC symbol are violet.

At a position directly above the graphic 14 of “Bit Length in an FEC Symbol”, an input box 15 for selecting and setting the number of bits (10 bits or 20 bits) of “FEC symbol Length” from a pull-down menu is displayed. The setting screen of FIG. 3A shows a state in which “10” is selected and set in the input box 15.

In addition, below the graphic 12 of “Number of FEC Symbols in a Codeword”, as an error included in one codeword, a graphic 16 of “Bit Error” and a graphic 17 of “FEC Symbol Error” are color-coded and displayed in a graphic 12 b of one Codeword. For example, color-coding display is performed in such a manner that the graphic 12 b of one Codeword is violet, the graphic 16 of “Bit Error” is yellow, and the graphic 17 of “FEC symbol Error” is red.

At a position directly above the graphic 12 b of one Codeword where the graphic 16 of “Bit Error” and the graphic 17 of “FEC symbol Error” are displayed, an input box 18 for setting a threshold value of “FEC symbol Error Threshold” using an equality sign (=), an inequality sign with an equality sign (≥) and a numeral is displayed.

At a position directly below of the graphic 12 b of one Codeword where the graphic 16 of “Bit Error” and the graphic 17 of “FEC Symbol Error” are displayed, an input box 19 for inputting the number of FEC symbols forming one codeword is displayed.

Then, in an upper portion of the setting screen 11 of FIG. 3A, a selection item 20 of “FEC symbol Capture Setting” is displayed. As shown in FIG. 3B, in regard to the selection item 20 of “FEC symbol Capture Setting”, selection items of settings corresponding to a communication standard of the device under test W are displayed in a pull-down menu. In an example of FIG. 3B, “Variable”, “50G PAM4”, “100G PAM4”, and “25G NRZ” are displayed as selection items in a pull-down menu.

FIG. 3A shows a state in which “Variable” is selected as the selection item 20 of “FEC symbol Capture Setting”. In the state in which “Variable” is selected, it is possible to allow free selection and input to each input box from the pull-down menu.

In the example of FIG. 3A, “50G PAM4”, “100G PAM4”, and “25G NRZ” can be selected as the selection item 20 of a preset setting, and in a case where any preset setting is selected, respective parameters based on a communication standard of the selected preset setting is automatically set.

For example, in a case where “50G PAM4” is selected as the preset setting, the respective parameters are automatically set in such a manner that the codeword length is “544”, the FEC symbol length is “10”, and the FEC symbol Error Threshold is “16”.

In a case where “100G PAM4” is selected as the preset setting, the respective parameters are automatically set in such a manner that the codeword length is “272”, the FEC symbol length is “20”, and the FEC symbol Error Threshold is “16”.

In a case where “25G NRZ” is selected as the preset setting, the respective parameters are automatically set in such a manner that the codeword length is “528”, the FEC symbol length is “10”, and the FEC symbol Error Threshold is “8”.

In this way, on the setting screen 11 of FIG. 3A, a configuration relationship of the FEC symbol to one codeword and a correspondence relationship of the FEC symbol error to one codeword are graphically displayed in an identifiable manner. With this, it is possible to allow the user to set the respective parameters of the FEC to the signal received from the device under test W after visually recognizing the configuration relationship or the correspondence relationship of “Number of FEC Symbols in a Codeword”, “Bit Length in an FEC Symbol”, “Bit Error”, and “FEC symbol Error” even though the user is not an expert who knows the communication standard of the device under test W.

On the setting screen 11 of FIG. 3A, although a case where “Bit Length in an FEC Symbol”, and “Bit Error” and “FEC symbol Error” are vertically arranged centering on “Number of FEC Symbols in a Codeword” and are graphically displayed has been shown such that the configuration relationship of “Number of FEC Symbols in a Codeword”, “Bit Length in an FEC Symbol”, “Bit Error”, and “FEC Symbol Error” is easily visually recognized, the invention is not limited to this arrangement. For example, “Bit Length in an FEC Symbol”, and “Bit Error” and “FEC Symbol Error” may be reversely arranged or “Bit Length in an FEC Symbol”, and “Bit Error” and “FEC Symbol Error” may be arranged above or below “Number of FEC Symbols in a Codeword” and may be graphically displayed.

The storage unit 5 stores symbol string data fetched from the signal reception unit 3 a in units of blocks at the setting timing set in advance with a storage capacity allocated in advance under the control of the control unit 7. In the embodiment, a mass of symbol string data that can be displayed in one display region (a display size including scroll display) of the display unit 6 is defined as one block. For example, in a case where the storage capacity to be allocated is 8 Mbits (corresponding to 4 Msymbols of symbol string data) and a mass of symbol string data that can be displayed in one display region of the display unit 6 is defined as one block, 1 block=65536 bits=32768 symbols, the symbol string data of 4 Msymbols is divided into a predetermined number of divisions (any number of divisions of 1, 2, 4, 8, 16, 32, 64, and 128) set in advance is and stored in the storage unit 5.

A maximum number of divisions of the symbol string data is determined corresponding to the storage capacity allocated to the storage unit 5. For example, in a case where the storage capacity allocated to the storage unit 5 is 8 Mbits, the maximum number of divisions of the symbol string data is 128.

The storage unit 5 stores a bit string of the NRZ signal or a symbol string of the PAM4 signal (a string of symbols having symbol values of 0, 1, 2, and 3) input to the device under test W as a test signal of a known pattern from the signal synthesis and output unit 2 c. The bit string of the NRZ signal or the symbol string of the PAM4 signal input to the device under test W as the test signal of the known pattern is reference data to be a reference for comparison with input data that is generated from the signal received from the device under test W.

The storage unit 5 stores a counting result of error counting means 7 a described below of the control unit 7. In addition, the storage unit 5 stores information regarding the setting timing, the baud rate, the generation conditions of the bit string or the symbol string, and the like. Such information can be appropriately selected and set by the operation unit 4 through the user interface.

A configuration may be made in which, in a case where the control unit 7 or the signal generator 2 can recognize the bit string of the NRZ signal or the symbol string of the PAM4 signal to be the test signal, the bit string of the NRZ signal or the symbol string of the PAM4 signal that is the test signal of the known pattern, that is, the reference data is stored from the control unit 7 or the signal generator 2 to the storage unit 5.

The display unit 6 is configured of, for example, a liquid crystal display or the like in the error rate measuring apparatus 1 of FIG. 1 , and displays the setting screen regarding an error rate measurement, each compliance test (a test about whether or not the device under test W conforms to the communication standard) including the error rate measurement, the capture screen, and the like under the control of display control means 7 c described below. The display unit 6 also has an operation function of the operation unit 4, such as softkeys on the display screen.

The display unit 6 displays a capture screen 21 in display forms shown in FIGS. 4 to 6 in addition to the setting screen 11 of FIG. 3A under the control of the display control means 7 c described below. Here, although the capture screen 21 will be described referring to FIG. 4 as an example, on the capture screens 21 of FIGS. 5 and 6 , the same components as those in FIG. 4 are represented by the same numbers, and description thereof will not be repeated.

FIG. 4 shows an example of the capture screen 21 of the display unit 6. In a region of an upper right portion of the capture screen 21 of FIG. 4 , “Block”, “Block Length”, and “Trigger Position” are displayed. In “Block”, an input box 22 for inputting a numerical value indicating what number block is the MSB data and the LSB data displayed on the capture screen 21 is displayed. In “Block Length”, a size (length) of data for one block is displayed. In “Trigger Position”, a position of a trigger is displayed. The example of FIG. 4 shows a state in which “1” is input to the input box 22 of “Block”, “Block Length” is displayed as “32760” PAM4 Symbol, and “Trigger Position” is displayed as “0” CW “235” FEC symbol. In the input box 22 of “Block”, the numerical value up to the number of divisions (for example, 1 to 128) of the block determined corresponding to the storage capacity of the storage unit 5 can be set and input.

In a region below “Trigger Position” of the capture screen 21, “Viewer Mode” (viewing mode) that is used for debugging is displayed. In “Notation” of “Viewer Mode”, an input box 23 that designates notation of data (“Bin (MSB/LSB), “Bin” (NRZ mode only), “Hex” (NRZ mode only), and “Symbol” (PAM4 mode only)) of data displayed on the capture screen 21 is displayed. In “Format” of “Viewer Mode”, an input box 24 that designates a display format (“Pattern” (only pattern data of symbol value display), “Pattern+Waveform” (waveform image display with, for example, a blue line is performed on the pattern data of the symbol value display)) of data on the capture screen is displayed. The notation and the display format of data are selected and set from respective pull-down menus. The example of FIG. 4 shows a state in which “Bin (MSB/LSB)” is selected from the pull-down menu of the input box 23 of “Notation”, and “Pattern” is selected from the pull-down menu of the input box 24 of “Format”.

In a region below “Viewer Mode” of the capture screen 21, “Error” is displayed. In “Error”, check boxes 25 and 26 for color-coding display of bits with an error are displayed corresponding to a transition state. The example of FIG. 4 shows a state in which the check box 25 of “INS” for displaying a bit in red in a case where there is an Insertion Error (0→1) and the check box 26 of “OMI” for displaying a bit in yellow in a case where there is an Omission Error (1→0) are checked.

In a region below “Error” of the capture screen 21, “Move and Search” for searching for a specific pattern is displayed. A specific pattern to be searched is input to an input box 27 of “Pattern” of “Move and Search”, a pattern to be searched (any of MSB, LSB, and All) is selected and set (in FIG. 4 , “All” is selected and set) from a pull-down menu in an input box 28 of “Target”, and successive search is performed by a magnifier button 29.

In a region below “Move and Search” of the capture screen 21, “Codeword Head Position Jump” for moving a cursor 21 a to a head bit of a desired codeword based on an operation of a softkey on the capture screen 21 and a calculation result (codeword head position) of codeword position calculation means 7 b described below is displayed. In “Codeword Head Position Jump”, a softkey 30 for moving the cursor 21 a on the capture screen 21 to a head bit of a first codeword, a softkey 31 for moving the cursor 21 a to a head bit of a previous codeword with the cursor 21 a on the capture screen 21 as a starting point, a softkey 32 for moving the cursor 21 a to a head bit of a next codeword with the cursor 21 a on the capture screen 21 as a starting point, and a softkey 33 for moving the cursor 21 a on the capture screen 21 to a head bit of a last codeword are displayed.

In a region below “Codeword Head Position Jump” of the capture screen 21, “Error Search” for performing continuous error search is displayed. In “Error Search”, “Search Mode”, “Continuous Error”, and “Target” for setting a search mode, data to be searched, and the number of errors as error search conditions are displayed. In “Search Mode”, an input box 34 for selecting and setting a search mode (any of FEC symbol and bit) from a pull-down menu is displayed. The example of FIG. 4 shows a state in which “FEC symbol” is selected and set as the search mode from the pull-down menu of the input box 34. In “Continuous Error”, input boxes 35 and 36 for setting the number of errors using an equality sign (=), an inequality sign with an equality sign (≥) and a numeral are displayed. In “Target”, an input box 37 for selecting and setting data to be searched (any of MSB, LSB, and All) from a pull-down menu is displayed. The example of FIG. 4 shows a state in which, as the error search conditions, “≥” is input to the input box 35, “1” is input to the input box 36, and “All (full range)” is input to the input box 37, and FEC symbol errors that are continuous in one FEC symbol or more are searched in all data.

In a region below “Target”, a softkey 38 for moving the cursor 21 a on the capture screen 21 to a position of a first error bit, a softkey 39 for moving the cursor 21 a to a position of a previous error bit with the cursor 21 a on the capture screen 21 as a starting point, a softkey 40 for moving the cursor 21 a to a position of a next error bit with the cursor 21 a on the capture screen 21 as a starting point, and a softkey 41 for moving the cursor 21 a on the capture screen 21 to a position of a last error bit are displayed.

In a data display region 42 on a left side of “Block Length” of the capture screen 21, the MSB data and the LSB data of each symbol of the symbol string data for one block based on the input data are vertically arranged in a pair and displayed with the vertical axis on the display as an address and the horizontal axis as a bit. The example of FIG. 4 shows a state in which the MSB data and the LSB data vertically arranged in a pair and displayed form data of one symbol, and in a state in which the MSB data and the LSB data for 30 symbols are vertically arranged in a row, the MSB data and the LSB data of the symbols for nine rows are vertically arranged in the respective rows and displayed in the data display region 42.

The MSB data and the LSB data not displayed in the data display region 42 can be displayed in the data display region 42 and confirmed using a scroll bar 43 on a right side.

In the data display region 42 where the MSB data and the LSB data of each symbol are displayed, a section line 44 is displayed by each one FEC symbol length set by the operation unit 4. The example of FIG. 4 shows a state in which the one FEC symbol length is set to 10 bits by the operation unit 4, and the section line 44 is displayed by 10 bits.

The MSB data and the LSB data of each symbol can also be subjected to a line break and displayed by each FEC Symbol set by the operation unit 4. For example, in a case where the FEC symbol length is set to 20 bits, as shown on the capture screen 21 of FIG. 5 , the MSB data and the LSB data of each symbol of the symbol string data are subjected to a line break by 20 bits and displayed.

Below the data display region 42 on the capture screen 21, a softkey 45 that gives an instruction to display MSB data and LSB data of a first block in the data display region 42, a softkey 46 that gives an instruction to display MSB data and LSB data of a previous block in the data display region 42, a softkey 47 that gives an instruction to display MSB data and LSB data of a next block in the data display region 42, and a softkey 48 that gives an instruction to display MSB data and LSB data of a last block in the data display region 42 are displayed.

In a region of a lower portion of the capture screen 21, as a result of error counting, “First Error Block/Address”, “Last Error Block/Address”, “Total Error Counts Bit Error/Total Bits”, “Total FEC Symbol Error Counts FEC Symbol Error/Total FEC Symbols”, and “Capture Depth” are displayed. In a display box 49 of “First Error Block/Address”, a block and an address of a location where an error occurs first are displayed. In a display box 50 of “Last Error Block/Address”, a block and an address of a location where an error occurs at last are displayed. In a display box 51 of “Total Error Counts Bit Error/Total Bits”, the total number of bit errors counted in total and the total number of bits are displayed. In a display box of “Total FEC Symbol Error Counts FEC Symbol Error/Total FEC Symbols”, the number of FEC symbol errors and the number of codewords at the set FEC symbol length are counted and displayed. In a display box 53 of “Capture Depth”, the number of bits acquired by capture is displayed.

The control unit 7 is configured of, for example, a central processing unit (CPU) and a storage element, such as a read only memory (ROM) or a random access memory (RAM), to measure an error rate of the PAM4 signal, integrally controls the signal generator 2, the error detector 3, the operation unit 4, the storage unit 5, and the display unit 6, and includes error counting means 7 a, codeword position calculation means 7 b, and display control means 7 c.

In a case where the test signal input to the device under test W is the NRZ signal, the error counting means 7 a counts errors detected by the data comparison unit 3 d (including counting codewords) and counts FEC symbol errors detected at one FEC symbol interval.

In a case where the test signal input to the device under test W is the PAM4 signal, the error counting means 7 a counts MSB errors and LSB errors detected by the data comparison unit 3 d (including counting codewords), and counts FEC symbol errors detected at one FEC symbol interval.

The codeword position calculation means 7 b calculates position information of a codeword based on the codeword length and the FEC symbol length set by the operation unit 4, the codeword head symbol information stored in the position information storage unit 3 c, the FEC symbol position stored in the data storage unit 3 e, and position information (address) of the cursor 21 a on the capture screen 21.

In addition, the codeword position calculation means 7 b calculates position information of a codeword indicating an FEC symbol and a codeword corresponding to a currently selected position of the cursor 21 a on the capture screen 21 in association with the following procedure (1) to (4).

(1) The codeword head position is calculated by a calculation expression of FEC symbol position−(codeword head symbol information: FEC symbol length) . . . (1) based on the FEC symbol length (10 bits or 20 bits) set by the operation unit 4, the codeword head symbol information stored in the position information storage unit 3 c by notification from the synchronization detection unit 3 b, and the FEC symbol position stored in the data storage unit 3 e by notification from the data comparison unit 3 d.

(2) A remainder of dividing the codeword head position obtained in (1) by the number of bits of one codeword length is obtained and is further subtracted from the number of bits of one codeword length to calculate codeword position information of a zeroth address of the capture screen 21. That is, the codeword position information of the zeroth address of the capture screen 21 is calculated by a calculation expression of (codeword length*FEC symbol length)−(codeword head position % (codeword length*FEC symbol length) . . . (2).

(3) The position of the cursor 21 a on the capture screen 21 is added to a result obtained in (2) and an addition result is divided by the codeword length to calculate a position of a current codeword. That is, position information [codeword] of the current codeword is calculated by a calculation expression of (codeword position information (bit) of zeroth address of capture screen 21+selected address of cursor 21 a on capture screen 21)/(FEC symbol length*codeword length) . . . (3).

(4) The position of the cursor 21 a on the capture screen 21 is added to a result obtained in (2), and a remainder of dividing an addition result by the codeword length is further divided by the FEC symbol length to calculate a position of a current FEC symbol. That is, position information [FEC symbol] of the current codeword is calculated by a calculation expression (codeword position information (bit) of zeroth address of capture screen 21+selected address of cursor 21 a on capture screen 21)% (FEC symbol length*codeword length)/FEC symbol length . . . (4).

A result calculated by the above-described calculation is displayed in “codeword Pos” of the capture screen 21. For example, FIG. 4 shows a state in which “0:90:MSB” is displayed in “codeword Pos” of the capture screen 21 as the codeword position information. The codeword position information indicates that a codeword currently selected by the cursor 21 a on the capture screen 21 is a 90th FEC symbol of a zeroth codeword in the MSB.

The display control means 7 c controls display on the display screen of the display unit 6, for example, the setting screen 11 of FIG. 3A or the capture screen 21 of FIGS. 4 to 6 .

Next, as a processing operation of error counting including data division display of the error rate measuring apparatus 1 configured as above, a case where the test signal of the PAM4 signal is input to the device under test W will be described as an example referring to FIG. 7 .

As shown in FIG. 7 , first, the setting parameters to the received signal from the device under test W are set by the operation unit 4 (ST11). Specifically, on the setting screen 11 of FIG. 3A, one codeword length, one FEC symbol length, and the FEC symbol Error Threshold are set based on the communication standard of the device under test W to be measured or the preset setting (for example, 50G PAM4) corresponding to the communication standard of the device under test W is selected and set.

After the above-described setting ends, the PAM4 signal (for example, 50G PAM4 conforming to the setting parameters) of the known pattern with an inserted error is input as the test signal to the device under test W by the signal generator 2 (ST12).

Then, a signal returned from the device under test W with the input of the test signal to the device under test W is received and converted into symbol string data by the signal reception unit 3 a, and the converted symbol string data is stored in the storage unit 5 (ST13).

Next, the head of one FEC symbol (10 bits or 20 bits) of the symbol string data fetched from the storage unit 5 synchronously with the reference data (test signal) at the setting timing is captured, and the symbol string data is divided into MSB data and LSB data by the data division means 3 da (ST14). Then, the divided MSB data and LSB data are vertically arranged in a pair and displayed on the capture screen 21 of FIG. 4 or 5 (ST15). For example, as shown in FIG. 4 , the MSB data and the LSB data of symbols for nine rows are vertically arranged in pairs in the respective rows and displayed in the data display region 42 such that the MSB data and the LSB data for 30 symbols are vertically arranged in pairs in a row. The head of one FEC symbol of the symbol string data is detected by making the counter of the data comparison unit 3 d run free to assume the head.

Subsequently, each of the MSB data and the LSB data is compared with the error data (“1”) by the data comparison unit 3 d to detect each of MSB errors and LSB errors of each one codeword length, and the detected MSB errors and LSB errors of each one codeword length are counted by the error counting means 7 a (ST16). In this case, the number of codewords is also counted.

The error data (“1”) is divided into error data for comparing with the MSB data and error data for comparing with the LSB data, in a case where the MSB data is “1”, this is detected and counted as an MSB error, and in a case where the LSB data is “1”, this is detected and counted as an LSB error.

Then, the MSB data and the LSB data are divided by each one FEC symbol length, FEC symbol errors are detected in each of the MSB data and the LSB data at one FEC symbol interval, and the detected FEC symbol errors are counted by the error counting means 7 a (ST17). For example, in a case where one FEC symbol length is 10 bits, the MSB data and the LSB data are divided by 10 bits, and in a case where an error occurs even in one bit within 10 bits, this is detected and counted as one FEC symbol error. Then, a result counted by the error counting means 7 a is displayed on, for example, the capture screen 21 of FIG. 4 or 5 under the control of the display control means 7 c.

In a case where the NRZ signal is input as the test signal to the device under test W, first, the setting parameters to the received signal from the device under test W are set by the operation unit 4. Specifically, on the setting screen 11 of FIG. 3A, one codeword length, one FEC symbol length, and the FEC symbol Error Threshold are set based on the communication standard of the device under test W to be measured or the preset setting (for example, 25G NRZ) corresponding to the communication standard of the device under test W is selected and set.

After the above-described setting ends, the NRZ signal (for example, 25G NRZ conforming to the setting parameters) of the known pattern with an inserted error is input as the test signal to the device under test W by the signal generator 2.

Then, a signal returned from the device under test W with the input of the test signal to the device under test W is received and converted into bit string data by the signal reception unit 3 a, and the converted bit string data is stored in the storage unit 5. Then, the bit string data stored in the storage unit 5 is displayed on the capture screen 21 of FIG. 6 with the vertical axis as an address and the horizontal axis as a bit.

Next, the head of one FEC symbol (10 bits or 20 bits) of the bit string data fetched from the storage unit 5 synchronously with the reference data (test signal) at the setting timing is captured, each bit is compared with the error data (“1”) by the data comparison unit 3 d to detect errors of each one codeword length, and the detected errors of each one codeword length are counted by the error counting means 7 a. In this case, the number of codewords is also counted. The head of one FEC symbol of the bit string data is detected by making the counter of the data comparison unit 3 d run free to assume the head.

Subsequently, the bit string data is divided by each one FEC symbol length, FEC symbol errors are detected at one FEC symbol interval, and the detected FEC symbol errors are counted by the error counting means 7 a. For example, in a case where one FEC symbol length is 10 bits, the bit string data is divided by 10 bits, and in a case where an error occurs even in one bit within 10 bits, this is detected and counted as one FEC symbol error. Then, a result counted by the error counting means 7 a is displayed on, for example, the capture screen 21 of FIG. 6 under the control of the display control means 7 c.

Next, as a calculation method of position information of a codeword of the error rate measuring apparatus 1 configured as above, a method of calculating position information of a codeword currently selected by the cursor 21 a on the capture screen 21 of FIG. 4 as an example will be described referring to FIG. 8 .

ST21 of FIG. 8 : The codeword head position is calculated by the calculation expression (1) based on the FEC symbol length set by the operation unit 4, the codeword head symbol information stored in the position information storage unit 3 c, and the FEC symbol position stored in the data storage unit 3 e.

ST22 of FIG. 8 : The codeword position information of the zeroth address of the capture screen 21 is calculated by the calculation expression (2) based on the codeword head position calculated by the calculation expression (1) and the codeword length and the FEC symbol length set by the operation unit 4.

ST23 of FIG. 8 : as current codeword position information [codeword], what codeword is currently selected by the cursor 21 a on the capture screen 21 is calculated by the calculation expression (3).

ST24 of FIG. 8 : as current codeword position information [FEC symbol], what FEC symbol in one codeword is currently selected by the cursor 21 a on the capture screen 21 is calculated by the calculation expression (4).

Next, a specific numerical example (Example 1 and Example 2) of the position information of the codeword obtained by the above-described calculation method will be described.

It is assumed that the codeword length set by the operation unit 4 is “544 FEC symbols”, the FEC symbol length is “10 bits”, the codeword head symbol information stored in the position information storage unit 3 c is “2”, and the FEC symbol position stored in the data storage unit 3 e is “10000”.

First, the codeword head position [bit] is 10000−(2*10)=9980 [bit] from the calculation expression of FEC symbol position−(codeword head symbol information*FEC symbol length) . . . (1).

The codeword position information of the zeroth address of the capture screen 21 is (544*10)−(9980% (544*10))=900 [bit] from the calculation expression of (codeword length*FEC symbol length)−(codeword head position % (codeword length*FEC symbol length)) . . . (2).

[Example 1] Case where an address currently selected by the cursor 21 a on the capture screen 21 of FIG. 4 is the zeroth address (decimals of a calculation result is rounded down)

The current codeword position information [codeword] is (900+0)/(544*10)=0 from the calculation expression of (codeword position information of zeroth address of capture screen 21+address currently selected by cursor 21 a on capture screen 21)/(FEC symbol length*codeword length) . . . (3).

The current codeword position information [FEC symbol] is (900+0)% (544*10)/10=90 from the calculation expression of (codeword position information of zeroth address of capture screen 21+address currently selected by cursor 21 a on capture screen 21)% (FEC symbol length*codeword length)/FEC symbol length . . . (4).

With this, in a case of Example 1, a position currently selected by the cursor 21 a on the capture screen 21 is the 90th FEC symbol of the zeroth codeword. Then, in a case where the cursor 21 a on the capture screen 21 is at a position of the MSB, “0:90:MSB” is displayed in “codeword Pos” of the capture screen 21.

[Example 2] Case where an address currently selected by the cursor 21 a on the capture screen 21 of FIG. 6 is a 4540th address (decimals of a calculation result are rounded down)

The current codeword position information [codeword] is (900+4540)/(544*10)=1 from the calculation expression (3).

The current codeword position information [FEC symbol] is 900+4540)% (544*10)/10=0 from the calculation expression (4).

With this, in a case of Example 2, a position currently selected by the cursor 21 a on the capture screen 21 is a zeroth FEC symbol of a first codeword. Then, in a case where the cursor 21 a on the capture screen 21 is at a position of the LSB, “1:0:LSB” is displayed in the “Codeword Pos” of the capture screen 21.

Incidentally, in the above-described embodiment, as shown in FIG. 1 , although a configuration is made in which the signal generator 2, the error detector 3, the operation unit 4, the storage unit 5, the display unit 6, and the control unit 7 are included in the error rate measuring apparatus 1, the invention is not limited to this configuration. For example, the signal generator 2 and the error detector 3 can also be separately modularized or may be housed in individual housings, and can also be configured of an external apparatus, such as a personal computer to which the operation unit 4 and the display unit 6 are externally connected.

In this way, according to the embodiment, since the codeword position currently selected by the user with the cursor 21 a on the capture screen 21 has a function of displaying how far is the currently selected codeword position from the head position of the codeword in capture data, it is possible to instantly recognize a relationship between a codeword position and a delimiter of each codeword.

In a case where an error occurs in the device under test W due to a specific input pattern, it is possible to visually recognize where an error is likely to occur or occurrences of an Uncorrectable codeword (a codeword on which forward error correction is impossible) of each codeword.

In addition, with the movement function to the codeword head position using the softkeys 30, 31, 32, and in FIGS. 4 to 6 , the delimiter of the codeword is easily recognized, and debugging can be easily performed.

In this way, according to the embodiment, as shown in FIG. 4 or 5 , the symbol string data is divided into the MSB data and the LSB data, and the divided MSB data and LSB data are displayed in parallel on the capture screen 21 or are vertically arranged in a pair and displayed on the capture screen 21, whereby it is possible to allow the user to perform data analysis while comparing the MSB data and the LSB data on the capture screen 21. In addition, it is possible to allow the user to visually discriminate which of the MSB data and the LSB data has an error or has deviation.

Although the best mode of the error rate measuring apparatus and the codeword position display method according to the invention has been described above, the invention is not limited by the description and the drawings according to this mode. That is, it is a matter of course that other modes, examples, operation techniques and the like made by those skilled in the art based on this mode are all included in the scope of the invention.

DESCRIPTION OF REFERENCE NUMERALS AND SIGNS

-   -   1 error rate measuring apparatus     -   2 signal generator     -   2 a first signal generation unit     -   2 b second signal generation unit     -   2 c signal synthesis and output unit     -   3 error detector     -   3 a signal reception unit     -   3 b synchronization detection unit     -   3 c position information storage unit     -   3 d data comparison unit     -   3 da data division means     -   3 e data storage unit     -   4 operation unit     -   5 storage unit     -   6 display unit     -   7 control unit     -   7 a error counting means     -   7 b codeword position calculation means     -   7 c display control means     -   11 setting screen     -   12, 12 a, 12 b graphic of Codeword     -   13, 15, 18, 19, 22, 23, 24, 27, 28, 34, 35, 36, 37 input box     -   14 graphic of FEC Symbol     -   16 graphic of Bit Error     -   17 graphic of FEC Symbol Error     -   20 selection item     -   21 capture screen     -   21 a cursor     -   25, 26 check box     -   29 magnifier button     -   30, 31, 32, 33, 38, 39, 40, 41, 45, 46, 47, 48 softkey     -   42 data display region     -   43 scroll bar     -   44 section line     -   49, 50, 51, 52, 53 display box     -   W device under test 

What is claimed is:
 1. An error rate measuring apparatus that inputs a Non Return to Zero (NRZ) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the received signal and the test signal, the error rate measuring apparatus comprising: a processor configured to sets a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test; and a display configured to displays bit string data obtained by converting the signal received from the device under test on a display screen, wherein the processor is configured to, from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, the codeword length, and a position of a cursor to select a symbol of the bit string data on the display screen, to calculate position information of a codeword indicating a position of the symbol currently selected by the position of the cursor in a codeword and a position of the codeword in the received signal, and wherein the display is configured to display the position information of the codeword calculated by the processor on the display screen.
 2. An error rate measuring apparatus that inputs a Pulse Amplitude Modulation 4 (PAM4) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the received signal and the test signal, the error rate measuring apparatus comprising: a processor configured to sets a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test; and a display configured to displays most significant bit string data and least significant bit string data of each piece of symbol string data obtained by converting the signal received from the device under test in parallel on a display screen, wherein the processor is configured to, from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, the codeword length, and a position of a cursor to select a symbol of the most or least significant bit string data on the display screen, to calculate position information of a codeword indicating a position of the symbol currently selected by the position of the cursor in a codeword and a position of the codeword in the received signal, and wherein the display is configured to displaying the position information of the codeword calculated by the codeword position calculation means on the display screen.
 3. The error rate measuring apparatus according to claim 2, wherein the processor is further configured to: calculate a codeword head position from the FEC symbol length, the codeword head symbol information indicating that the head symbol of the codeword is present, and an FEC symbol position, calculate codeword position information of a zeroth address of the display screen from the codeword head position, the codeword length, and the FEC symbol length, and calculate the position information of the codeword indicating the position of the symbol currently selected by the cursor in the codeword and the position of the codeword in the received signal from the codeword position information of the zeroth address of the display screen, the codeword length, the FEC symbol length, and the position of the cursor on the display screen.
 4. The error rate measuring apparatus according to claim 2, wherein the display is configured to move the cursor to a head bit of a desired codeword based on a key operation of the processor and a calculation result of the codeword position calculation means.
 5. A codeword position display method for an error rate measuring apparatus that inputs a Non Return to Zero (NRZ) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the received signal and the test signal, the codeword position display method comprising: a step of setting a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test; a step of displaying bit string data obtained by converting the signal received from the device under test on a display screen of a display; a step of, from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, the codeword length, and a position of a cursor to select a symbol of the bit string data on the display screen, calculating position information of a codeword indicating a position of the symbol currently selected by the position of the cursor in a codeword and a position of the codeword in the received signal; and a step of displaying the calculated position information of the codeword on the display screen.
 6. A codeword position display method for an error rate measuring apparatus that inputs a Pulse Amplitude Modulation 4 (PAM4) signal of a known pattern as a test signal to a device under test, receives a signal from the device under test with the input of the test signal, and measures whether or not a forward error correction (FEC) operation of the device under test is possible based on a comparison result of the received signal and the test signal, the codeword position display method comprising: a step of setting a codeword length and an FEC symbol length of the FEC as a setting parameter to the signal received from the device under test corresponding to a communication standard of the device under test; a step of displaying most significant bit string data and least significant bit string data of each piece of symbol string data obtained by converting the signal received from the device under test in parallel on a display screen of a display; a step of, from the FEC symbol length, codeword head symbol information indicating that a head symbol of a codeword is present, the codeword length, and a position of a cursor to select a symbol of the bit string data on the display screen, calculating position information of a codeword indicating a position of the symbol currently selected by the position of the cursor in a codeword and a position of the codeword in the received signal; and a step of displaying the calculated position information of the codeword on the display screen.
 7. The codeword position display method according to claim 6, wherein the step of calculating by the codeword position calculation means includes a step of calculating a codeword head position from the FEC symbol length, the codeword head symbol information indicating that the head symbol of the codeword is present, and an FEC symbol position, calculating codeword position information of a zeroth address of the display screen from the codeword head position, the codeword length, and the FEC symbol length, and from the codeword position information of the zeroth address of the display screen, the codeword length, the FEC symbol length, and the position of the cursor on the display screen, calculating the position information of the codeword indicating the position of the symbol currently selected by the cursor in the codeword and the position of the codeword in the received signal.
 8. The codeword position display method according to claim 6, further comprising: a step of moving the cursor to a head bit of a desired codeword based on a key operation of a processor and a calculation result of the codeword position calculation means. 